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datashee t product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 1/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 tsz22111 ? 14? 001 www.rohm.com system motor driver series for cd ? dvd ? bd player 9ch system motor driver for car av bD8256EFV-M general description bD8256EFV-M is a 9ch motor driver developed for driving coil actuator (3ch), sled motor (2ch), a loading motor, and a three-phase motor for spindle. this chip has a built-in 2ch lvds (low voltage differential signaling) output for spherical aberration. this can drive the motor and coil of blu-ray drive. it has a built-in serial peripheral interface (spi) with a max clock frequency of 35mhz, for interfacing with the micro-controller. features ? built-in serial peripheral interface(spi) ? high efficiency at 180 pwm for spindle driver ? built-in 2-channel stepping motor driver for sled ? built-in actuator over current protection circuit ? built-in loading driver short-circuit protection ? aec-q100 qualified applications ? car navigation ? car av key specifications ? ron(spindle): 1.0? (typ) ? ron(loading): 1.5 ? (typ) ? power supply voltage range: 4.5v to 10.5v package w(typ) d(typ) h(max) htssop-b54 18.50mm 9.50mm 1.00mm typical application circuit figure 1. typical application circuit htssop-b54
datasheet datasheet 2/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M pin configuration (top view) block diagram hu+ 1 5 4 prev cc hu- 2 53 tkrnf hv + 3 52 fctlrnf hv - 4 51 fctlcdet hw+ 5 50 tkcdet hw- 6 49 sa o1+ hall_vc 7 48 sao1- spcnf 8 47 sao2+ bhld 9 46 sao2- sprnf 10 45 fctlo1+ fg 11 44 fctlo1- w_out 12 43 fctlo2+ v_out 13 42 fctlo2- u_out 14 41 tko+ spgnd 15 40 tko- slgnd 16 39 a ctgnd slo1+ 17 38 ldo+ slo1- 18 37 ldo- slrnf1 19 36 prtout slo2+ 20 35 muteb slo2- 21 34 prtlim slrnf2 22 33 v cc errout 23 32 prtft sdo 24 31 prtt sdi 25 30 pregnd sclk 26 29 shv slv 27 28 vreg figure 2. pin configurati on figure 3. block diagram pin description pin no. pin name function pin no. pin name function 1 hu+ hall amp. u positive input 28 vreg inside power supply for spi logic 2 hu- hall amp. u negative input 29 shv power supply for sdo output 3 hv+ hall amp. v negative input 30 pregnd pre block ground 4 hv- hall amp. v positive input 31 prtt protect time se tting for tracking 5 hw+ hall amp. w positive input 32 prt ft protect time setting for focus and tilt 6 hw- hall amp. w negative input 33 vcc power supply for pre driver and loading 7 hall_vc hall bias 34 prtlim limit setting for actuator protect 8 spcnf spindle driver loop filter 35 muteb mute input 9 bhld spindle current bottom hold 36 prtout protect output 10 sprnf spindle power supply and current s ense 37 ldo- loading driver negative output 11 fg fg output 38 ldo+ loa ding driver positive output 12 w_out spindle driver w output 39 actgnd actuator and loading power ground 13 v_out spindle driver v output 40 tko- tracking driver negative output 14 u_out spindle driver u output 41 tko+ tracking driver positive output 15 spgnd spindle power ground 42 fctl o2- focus tilt driver 2 negative output 16 slgnd sled power ground 43 fctlo2+ f ocus tilt driver 2 positive output 17 slo1+ sled driver 1 positive output 44 fctlo1- focus tilt driver 1 negative output 18 slo1- sled driver 1 negative output 45 fc tlo1+ focus tilt driver 1 positive output 19 slrnf1 sled 1 power supply and current sens e 46 sao2- sphere aberration 2 negative output 20 slo2+ sled driver 2 positive output 47 sao2+ sphere aberration 2 positive output 21 slo2- sled driver 2 negative output 48 sao1- sphere aberration 1 negative output 22 slrnf2 sled 2 power supply and current sense 49 sao1+ sphere aberration 1 positive output 23 errout serial data error output 50 tkcdet current detect for tracking drive 24 sdo serial data output 51 fctlcdet current detect for focus tilt drive 25 sdi serial data input 52 fctlrnf focus tilt power supply and current sense 26 sclk serial clock input 53 tkrnf tracking power supply and current sense 27 slv serial slave input 54 prevcc pre driver power supply
datasheet datasheet 3/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M absolute maximum ratings (ta = 25c) parameter symbol rating unit pre power supply voltage v vcc 15 v power mos power supply voltage v sprnf ,v slrnf1 ,v slrnf2 15 v pwm control / btl power supply voltage v prevcc ,v tkrnf ,v fctlrnf 7 v serial output power supply v shv 7 v input pin voltage 1 v in1 (1) 15 v input pin voltage 2 v in2 (2) 7 v output pin voltage 1 v out1 (3) 15 v output pin voltage 2 v out2 (4) 7 v power consumption pd 2.0 (5) w operating temperature range topr -40 to +90 c storage temperature range tstg -55 to +150 c junction temperature tjmax 150 c (1) bhld, spcnf (2) hu+, hu-, hv+, hv-, hw+, hw-, hall_vc, prtft, prtt, slv, sclk, sdi, tkcdet, fccdet, muteb (3) fg, u_out, v_out, w_out, slo1+, slo1-, slo2+, slo2-, errout, prtlim, prtout, ldo+, ldo (4) sdo, vreg, fctlo1+, fctlo1-, fctlo2+, fc tlo2-, tko+, tko-, sao1+, sao1-, sao2+, sao2 (5) ta=25c, pcb (70mm 70mm 1.6mm, glass epoxy standard board) mounting. derated by 16mw/c when operating above 25 c caution: operating the ic over the absolute maximum ratings may damage t he ic. in addition, it is impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. therefore, it is im portant to consider circuit protection measures, like adding a fuse, in case the ic is operated in a special mode exceeding the absolute maximum ratings. recommended operating ratings (ta = -40c to +90c) parameter symbol limits unit min. typ max. pre /loading driver power supply voltage (6) v vcc 4.5 8 10.5 v spindle driver power supply voltage (6)(7) v sprnf - v vcc - v sled motor driver power supply voltage (6)(7) v slrnf1 , v slrnf2 - v vcc - v pwm control power supply voltage (6) v prevcc 4.5 5 5.5 v actuator driver power supply voltage (6) v fctlrnf , v tkrnf 4.5 5 v prevcc v serial output power supply (6) v shv 3.0 3.3 3.6 v (6) consider power consumption when deciding power supply voltage. (7) set the voltage same as v vcc .
datasheet datasheet 4/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M electrical characteristics (unless otherwise specified, ta=25c, v vcc =v sprnf =v slrnf1 =v slrnf2 =8v, v prevcc =v tkrnf =v fctlrnf =5v, v shv =3.3v, r sprnf =0.33 ? , r slrnf =0.56 ? ) parameter symbol limits unit conditions min. typ max. circuit current prevcc quiescent current i q1 - 18 30 ma muteb=high spi=72h fe, 70h fe vcc quiescent current i q2 - 7 14 ma prevcc standby current i st1 - 3 6 ma muteb=low vcc standby current i st2 - 1 2 ma spindle driver hall bias voltage v hb 0.45 0.9 1.35 v ihb=10ma input bias current i hib - 0.5 3 a input level v him 50 - - mvpp common mode input range v hicm 1.5 - 3.8 v input dead zone (one side) v dzsp 0 10 40 mv input-output gain gm sp 0.98 1.24 1.50 a/v r sprnf =0.33 ? , r l =2 ? output on resistance (total sum) r onsp - 1 1.8 ? il=500ma output limit current i limsp 0.85 1.06 1.27 a r sprnf =0.33 ? pwm frequency f osc - 100 - khz r l =2 ? fg output low level voltage v fgl - 0.1 0.3 v 33k ? pull-up(3.3v) sled motor driver input dead zone (one side) v dzsl 5 15 30 mv input-output gain gm sl 0.84 1.10 1.36 a/v r slrnf1,2 =0.56 ? , r l =8 ? output on resistance (total sum) r onsl - 2.2 3.3 ? il=500ma output limit current i limsl 0.79 0.93 1.07 a r slrnf1,2 =0.56 ? pwm frequency f osc - 100 - khz r l =8 ? actuator driver output offset voltage v ofact -50 0 50 mv low gain mode output on resistance r onact - 1.5 2.0 ? il=500ma voltage gain 1 g vact1 10.5 11.7 12.9 db low gain mode voltage gain 2 g vact2 16.4 17.7 18.9 db high gain mode loading driver output offset voltage v ofld -100 0 100 mv low gain mode output on resistance r onld - 1.5 2.5 ? il=500ma voltage gain 1 g vld1 15.2 17.2 19.2 db low gain mode voltage gain 2 g vld2 16.7 18.7 20.7 db high gain mode actuator protection circuit prtt/prtf default voltage v prtref 1.00 1.06 1.12 v prtt/prtf protect detection voltage v prtdet 2.77 2.95 3.13 v prtlim voltage v prtlim 500 530 560 mv detection input offset voltage v ofdet -5 0 5 mv protect sign output prtout low level output voltage v ol1 - 0.1 0.3 v 33k ? pull-up(3.3v) errout low level output voltage v ol2 - 0.1 0.3 v 33k ? pull-up(3.3v) logic inputs (sdi,sclk,slv,muteb) low level input voltage v inl - - 0.5 v high level voltage v inh 2.2 - - v high level current (sdi,sclk,muteb) i inh - 33 66 a sdi,sclk,muteb=3.3v low level current (slv) i inl -60 -30 - a slv=0v function vcc drop mute voltage v mvcc 3.4 3.8 4.2 v lvds output difference movement output voltage v od 250 - 950 mv r l =100 ? offset voltage v oc 0.95 1.25 1.55 v r l =100 ? tsd tsd junction temperature ( 1) t tsd 150 175 200 c tsd hysteresis temperature (1) t hys - 25 - c (1) these items are specified by design,not tested during production
datasheet datasheet 5/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M electrical characteristics (unless otherwise specified, ta=-40c~90c, v vcc =v sprnf =v slrnf1 =v slrnf2 =8v, v prevcc =v tkrnf =v fctlrnf =5v, v shv =3.3v, r sprnf =0.33 ? , r slrnf =0.56 ? ) parameter symbol limits unit conditions min. typ max. circuit current prevcc quiescent current i q1 - 18 36 ma muteb=high spi=72h fe, 70h fe vcc quiescent current i q2 - 7 14 ma prevcc standby current i st1 - 3 6 ma muteb=low vcc standby current i st2 - 1 2 ma spindle driver hall bias voltage v hb 0.45 0.9 1.35 v ihb=10ma input bias current i hib - 0.5 3 a input level v him 50 - - mvpp common mode input range v hicm 1.5 - 3.8 v input dead zone (one side) v dzsp 0 10 45 mv input-output gain gm sp 0.85 1.24 1.63 a/v r sprnf =0.33 ? , r l =2 ? output on resistance (total sum) r onsp - 1 1.8 ? il=500ma output limit current i limsp 0.85 1.06 1.27 a r sprnf =0.33 ? pwm frequency f osc - 100 - khz r l =2 ? fg output low level voltage v fgl - 0.1 0.3 v 33k ? pull-up(3.3v) sled motor driver input dead zone (one side) v dzsl 3 15 35 mv input-output gain gm sl 0.84 1.10 1.36 a/v r slrnf1,2 =0.56 ? , r l =8 ? output on resistance (total sum) r onsl - 2.2 3.3 ? il=500ma output limit current i limsl 0.79 0.93 1.07 a r slrnf1,2 =0.56 ? pwm frequency f osc - 100 - khz r l =8 ? actuator driver output offset voltage v ofact -50 0 50 mv low gain mode output on resistance r onact - 1.5 2.0 ? il=500ma voltage gain 1 g vact1 9.4 11.7 13.5 db low gain mode voltage gain 2 g vact2 15.4 17.7 19.5 db high gain mode loading driver output offset voltage v ofld -110 0 110 mv low gain mode output on resistance r onld - 1.5 2.5 ? il=500ma voltage gain 1 g vld1 14.1 17.2 19.5 db low gain mode voltage gain 2 g vld2 15.6 18.7 21.0 db high gain mode actuator protection circuit prtt/prtf default voltage v prtref 0.98 1.06 1.14 v prtt/prtf protect detection voltage v prtdet 2.65 2.95 3.25 v prtlim voltage v prtlim 490 530 570 mv detection input offset voltage v ofdet -7 0 7 mv protect sign output prtout low level output voltage v ol1 - 0.1 0.3 v 33k ? pull-up(3.3v) errout low level output voltage v ol2 - 0.1 0.3 v 33k ? pull-up(3.3v) logic inputs (sdi,sclk,slv,muteb) low level input voltage v inl - - 0.5 v high level voltage v inh 2.2 - - v high level current (sdi,sclk,muteb) i inh - 33 75 a sdi,sclk,muteb=3.3v low level current (slv) i inl -75 -30 - a slv=0v function vcc drop mute voltage v mvcc 3.4 3.8 4.2 v lvds output difference movement output voltage v od 250 - 950 mv r l =100 ? offset voltage v oc 0.95 1.25 1.55 v r l =100 ?
datasheet datasheet 6/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M typical performance curves 9 10 11 12 13 14 -50-25 0 255075100 gain : g vact1 (db) temparature (oc) 15 16 17 18 19 20 -50 -25 0 25 50 75 100 gain : g vact2 (db) temparature (oc) fctl1 voltage gain 1 (low gain mode) fctl1 voltage gain 2 (high gain mode) 9 10 11 12 13 14 -50-25 0 255075100 gain : g vact1 (db) temparature (oc) 15 16 17 18 19 20 -50 -25 0 25 50 75 100 gain : g vact2 (db) temparature (oc) fctl2 voltage gain 1 (low gain mode) fctl2 voltage gain 2 (high gain mode) prevcc=5v gain_selfctl=0 diff_fctl=1 prevcc=5v gain_selfctl=1 diff_fctl=1 prevcc=5v gain_selfctl=0 diff_fctl=1 prevcc=5v gain_selfctl=1 diff_fctl=1
datasheet datasheet 7/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M typical performance curves - continued 9 10 11 12 13 14 -50-25 0 255075100 gain : g vact1 (db) temparature (oc) 15 16 17 18 19 20 -50 -25 0 25 50 75 100 gain : g vact2 (db) temparature (oc) tk voltage gain 1 (low gain mode) tk voltage gain 2 (high gain mode) 14 15 16 17 18 19 20 -50-25 0 255075100 gain : g vld1 (db) temparature (oc) 15 16 17 18 19 20 21 22 -50 -25 0 25 50 75 100 gain : g vld2 (db) temparature (oc) ld voltage gain 1 (low gain mode) ld voltage gain 2 (high gain mode) prevcc=5v gain_seltk=0 prevcc=5v gain_seltk=1 vcc=8v gain_selld=0 vcc=8v gain_selld=1
datasheet datasheet 8/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M description of blocks serial peripheral interface (spi) 16 bit serial interfaces (slv, sclk, sdi, sdo) are prov ided to perform setting of operations and output levels. spi communication is performed while slv terminal is in low. sdi data are sent to internal shift r egister at the rising edge of sclk terminal. shift register data are loaded into 12 bit internal shift register at the rising edge of slv terminal according to the address map. readout operati on is performed when readout bit is set to 1. then state is read out at the falling edge of sclk terminal and output to sdo terminal. input-output timing figure 4 shows write/read timing of the serial ports. minimum timing of each item is as shown in the table below. in order to prevent increase in delay of spi input/output timing, wiring between slv/sclk/sdi/sdo and the microcomputer sh ould be as short as possible to minimize the wiring capacitance. symbol item min typ max unit a sdi setup time * 9 - - ns b sdi hold time * 9 - - ns c setup slv to sclk rising edge * 9 - - ns d sclk high pulse width * 10 - - ns e sclk low pulse width * 10 - - ns f setup sclk rising edge to slv * 9 - - ns g slv pulse width * 15 - - ns h sdo delay time * - - 10 ns i sdo hold time * 2 - - ns j sdo off time * - - 20 ns k sclk frequency - - 35 mhz * guaranteed design items figure 4. spi input timing d0 sdo slv sclk sdi c2 c3 b e d a c d7 h j i d0 f g dn-1 h dn
datasheet datasheet 9/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M dac register 1. input / output sequence enter the register address in the sdi input on the first 4 bi ts and data for a specific dac voltage in the next 12 bits. when specified as reg=02h (address for focus), reg 77h data is output to the sdo. when specified as reg 02h (address for non-focus), sdo becomes hi-z. slv sclk hi-z sdo d6 d5 d4 d3 d2 d1 d0 d7 sdi db da d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 c3 c2 c1 c0 figure 5. 12bit write / 8bit read sequence (when specified as reg=02h) slv sclk sdo hi-z sdi c1 c0 db da d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 c3 c2 figure 6. 12bit write sequence (when specified as reg 02h, c3, c2 1, 1) 2. address map (hereinafter register address is referred to as reg) dac register address map reg name r/w db da d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 reset ** 00h n/a - - - - - - - - - - - - - - 01h dfctl1 w 11 10 9 8 7 6 5 4 3 2 1 0 b 02h dfctl2 w 11 10 9 8 7 6 5 4 3 2 1 0 b 03h dtk w 11 10 9 8 7 6 5 4 3 2 1 0 b 04h dsl1 w 11 10 9 8 7 6 5 4 3 2 1 * 0 * b 05h dsl2 w 11 10 9 8 7 6 5 4 3 2 1 * 0 * b 06h dsa1 w 11 - - - - - - - - - - - b 07h dsa 2 w 11 - - - - - - - - - - - b 08h dsp w 11 10 9 8 7 6 5 4 3 2 1 0 b 09h dld w 11 10 9 8 7 6 5 4 3 2 1 0 b 0ah n/a - - - - - - - - - - - - - - 0bh n/a - - - - - - - - - - - - - - default : 0 * : fixed at 0 ** : refer to p9 about reset - : not affected even when data is written
datasheet datasheet 10/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M control register 1. input / output sequence when writing data to the control register, enter the register address in the first 7 bi ts of the sdi input, then set the 1bit r /w to 0 and enter the data of each setting in the last 8 bits. sdo is hi-z when r/w=0. when reading data from the control register , enter the register address in the first 7 bits of the sdi input, then set the 1 bi t r/w to 1. the last 8 bits are ignored. when r/w=1, 8- bit data of specified address is output to the sdo. slv sclk sdo hi-z sdi a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r/w a6 a5 figure 7. control register 8 bit wr ite sequence (a6, a5=1,1, r/w= 0) slv sclk hi-z d6 d5 d4 d3 d2 d1 d0 d7 sdo sdi a4 a3 a2 a1 a0 r/w a6 a5 figure 8. control register 8 bit r ead sequence (a6, a5=1,1, r/w= 1) 2. address map control register address map reg name r/w d7 d6 d5 d4 d3 d2 d1 d0 70h output _en1 r/w fctl1 _outen fctl2 _outen tk _outen sl _outen sa _outen sp _outen ld _outen n/a 71h - - - - - - - - - - 72h power _save1 r/w fctl1 _psb fctl2 _psb tk _psb sl _psb sa _psb sp _psb ld _psb n/a 73h - - - - - - - - - - 74h driver _set r/w n/a sp _brake gain _selfctl gain _seltk diff _fctl ld _brake gain _selld n/a 75h reset w rst _dac rst _ctlreg rst _pkterr rst _pktstop rst _ocp rst _short n/a n/a 76h pkt _time r/w n/a n/a pktstop _time1 pktstop _time0 n/a n/a n/a n/a 77h status _flag1 r all _err ocp _fctl ocp _tk short _ld tsd pkt _err pkt _stop uvlo _vcc 78h test0 r/w reserved reserved reserved reserved reserved reserved reserved reserved 79h test1 r/w reserved reserved reserved reserved reserved n/a n/a n/a 7ah test2 r/w n/a n/a reserved n/a reserved reserved reserved n/a 7bh rst _check r/w rst _checka rst _checkb n/a n/a n/a n/a n/a n/a 7ch - - - - - - - - - - 7dh - - - - - - - - - - 7eh - - - - - - - - - - 7fh - - - - - - - - - - write access to "reserved" bits should be made by "0" input. read access to "n/a" bits will return "0".
datasheet datasheet 11/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 3. details of control registers functions of each register are as shown below. ? reg 70h output_en1 (read / write) each driver output settings (hi-z/active) can be changed in reg 70h. bit name default function set "0" set "1" reset 7 fctl1_outen 0 fctl1 output enable disable enable a 6 fctl2_outen 0 fctl2 output enable disable enable a 5 tk_outen 0 tk output enable disable enable a 4 sl_outen 0 sl1,sl2 out put enable disable enable a 3 sa_outen 0 sa1,sa2 output enable disable enable a 2 sp_outen 0 sp output enable disable enable a 1 ld_outen 0 ld output enable disable enable a 0 n/a 0 - - - - ? reg 71h - bit name default function set "0" set "1" reset 7 - - - - - - 6 - - - - - - 5 - - - - - - 4 - - - - - - 3 - - - - - - 2 - - - - - - 1 - - - - - - 0 - - - - - - ? reg 72h power_save1 (read / write) power save mode settings for each block can be set in reg 72h. power save mode makes the output hi-z and turns off the internal circuit to reduce the current consumption. bit name default function set "0" set "1" reset 7 fctl1_psb 0 fctl1 block power save enable disable a 6 fctl2_psb 0 fctl2 block power save enable disable a 5 tk_psb 0 tk block power save enable disable a 4 sl_psb 0 sl1,sl2 block power save enable disable a 3 sa_psb 0 sa1,sa2 block power save enable disable a 2 sp_psb 0 sp block power save enable disable a 1 ld_psb 0 ld block power save enable disable a 0 n/a 0 - - - -
datasheet datasheet 12/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M ? reg 73h - bit name default function set "0" set "1" reset 7 - - - - - - 6 - - - - - - 5 - - - - - - 4 - - - - - - 3 - - - - - - 2 - - - - - - 1 - - - - - - 0 - - - - - - ? reg 74h driver_set (read / write) operation mode settings of the driver can be changed in reg 74h. bit name default function set "0" set "1" reset 7 n/a 0 - - - - 6 sp_brake 0 sp brake mode short brake reverse brake a 5 gain_selfctl 0 gain select fctl low gain high gain a 4 gain_seltk 0 gain select tk low gain high gain a 3 diff_fctl 0 differential fctl control mode differential control independent control a 2 ld_brake 0 ld brake mode ld output active ld output short brake a 1 gain_selld 0 gain select ld low gain high gain a 0 n/a 0 - - - - short brake/reverse brake c an be selected as spindle brake mode. low/high gain mode of the fo cus/tilt driver's gain can be selected. low/high gain mode of the tracking driver's gain can be selected. differential/independent drive of the focus and tilt driver can be se lected. see page 18 for more information. short brake mode (both positiv e & negative output low) can be activa ted when loading output is "active". low/high gain mode of the loading driver's gain can be switched. ? reg 75h reset (write) resister settings and latched error flag can be reset in reg 75h. bit name default function set "0" set "1" reset 7 rst_dac 0 dac reset normal reset e 6 rst_ctlreg 0 control register reset normal reset e 5 rst_pkterr 0 packet bit counts error reset normal reset e 4 rst_pktstop 0 no packet input error reset normal reset e 3 rst_ocp 0 actuator overcurrent protection latch off reset normal reset e 2 rst_short 0 ld supply/ground-fault protection latch off reset normal reset e 1 n/a 0 - - - - 0 n/a 0 - - - - reset all dac register value to 0. reset all control register value to default. reset packet bit counts e rror flag register value to 0. reset no packet input error flag register value to 0. reset actuator overcurrent pr otection flag register value to 0. reset loading supply/ground-fault pr otection flag register value to 0.
datasheet datasheet 13/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M ? reg 76h pkt_time (read / write) in reg 76h, you can specify or disable wait ti me until error operation in case of no spi input. bit name default function set "0" set "1" reset 7 n/a 0 - - - - 6 n/a 0 - - - - 5 pktstop_time1 0 spi packet watchdog timer operation time selection (00)=disabled, (01)=1ms, (10)=100 s, (11)=30 s a 4 pktstop_time0 0 a 3 n/a 0 - - - - 2 n/a 0 - - - - 1 n/a 0 - - - - 0 n/a 0 - - - - ? reg 77h status_flag (read) reg 77h outputs each protection state flag bit name default function set "0" set "1" reset 7 all_err 0 all error flags normal abnormal * 6 ocp_fctl 0 fctl overcurrent detection flag (fctl1, 2, tk output hi-z) normal abnormal c 5 ocp_tk 0 tk overcurrent detection flag (fctl1, 2, tk output hi-z) normal abnormal c 4 short_ld 0 ld supply/ground-fault protection detection flag (ld output hi-z) normal abnormal c 3 tsd 0 tsd detection flag (all output hi-z) normal abnormal f 2 pkt_err 0 number of packet bits error flag (flag only) normal abnormal c 1 pkt_stop 0 packet watchdog timer (all output hi-z) normal abnormal c 0 uvlo_vcc 0 vcc low voltage fault flag (all output hi-z) normal abnormal d *how to reset: all_err outputs all the error flags (ocp_fctl, ocp_tk, short_ld, tsd, pkt_err, pkt_stop, uvlo_vcc). therefore, reset conditions are depending on each flags. ? reg 78h test0 (read / write) bit name default function set "0" set "1" reset 7 reserved 0 - - - d 6 reserved 0 - - - d 5 reserved 0 - - - d 4 reserved 0 - - - d 3 reserved 0 - - - d 2 reserved 0 - - - d 1 reserved 0 - - - d 0 reserved 0 - - - d
datasheet datasheet 14/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M ? reg 79h test1 (read / write) bit name default function set "0" set "1" reset 7 reserved 0 - - - f 6 reserved 0 - - - f 5 reserved 0 - - - f 4 reserved 0 - - - f 3 reserved 0 - - - f 2 n/a 0 - - - - 1 n/a 0 - - - - 0 n/a 0 - - - - ? reg 7ah test2 (read / write) bit name default function set "0" set "1" reset 7 n/a 0 - - - - 6 n/a 0 - - - - 5 reserved 0 - - - f 4 n/a 0 - - - - 3 reserved 0 - - - f 2 reserved 0 - - - f 1 reserved 0 - - - f 0 n/a 0 - - - - ? reg 7bh rst_check (read / write) reg 7bh is the flag confirming reset comp letion of registers listed in page 15. bit name default function set "0" set "1" reset 7 rst_checka 0 reset a completion check flag 0 1 a 6 rst_checkb 0 reset b completion check flag 0 1 b 5 n/a 0 - - - - 4 n/a 0 - - - - 3 n/a 0 - - - - 2 n/a 0 - - - - 1 n/a 0 - - - - 0 n/a 0 - - - -
datasheet datasheet 15/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M register reset operations type "a" mode setting bit (reg 70h, 72h, 74h, 76h, 7bh[7]) reset conditions vcc < 3.8v or prevcc < 3.8v or vreg < 2.0v or muteb < 0.5v or rst_ctlreg(75h[6]) = 1 type "b" dac setting bit (reg 01h~09h, 7bh[6]) reset conditions vcc < 3.8v or prevcc < 3.8v or vreg < 2.0v or muteb < 0.5v or rst_dac(75h[7]) = 1 type "c" operational state (latched) ou tput bit (reg 77h[1,2,4,5,6]) reset conditions vcc < 3.8v or prevcc < 3.8v or vreg < 2.0v or muteb < 0.5v or rst_ctlreg (75h[6]) = 1 or rst_pkterr (75h[5]) = 1 (for pkt_err(77h[2])) or rst_pktstop (75h[4]) = 1 (for pkt_stop(77h[1])) or rst_ocp (75h[3]) = 1 (for ocpfctl(77h[6]) and ocptk(77h[5])) or rst_short (75h[2]) = 1 (for short_ld(77h[4])) type "d" operational state (continuously up dated) output bit 1 (reg 77h[0]) reset conditions prevcc < 2.0v or vreg < 1.2v or muteb < 0.5v type "e" reset setting bit (reg 75h) reset conditions self-reset (if set to 1, automatically returns to "0" following reset operation) type "f" operational state (continuously up dated) output bit 2 (reg 77h[3]) reset conditions vcc < 3.8v or prevcc < 3.8v or vreg < 2.0v or muteb < 0.5v reset operations dac reg d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 rst_short 75h[2] = 1 *1 rst_ocp 75h[3] = 1 *1 rst_pktstop 75h[4] = 1 *1 rst_pkterr 75h[5] = 1 *1 rst_ctlreg 75h[6] = 1 *1 rst_dac 75h[7] = 1 *1 muteb < 0.5v reset condition control reg 01h ~ 09h 70h 72h 74h soft self reset 75h 76h 77h 7bh hard vcc < 3.8v prevcc < 2.0v prevcc < 3.8v *1 reset conditions of reg 77h[7] are dependent upon reg 77h[6]-77h[0].
datasheet datasheet 16/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M spi input / output terminal processing provided with input terminals slv, sclk and sdi, and output te rminal sdo, as serial interfaces. input terminals slv, sclk and sdi have built-in 100k ? (typ) pull-up/pull-down resistor. output terminal sdo is able to output the voltage set at shv as high level voltage in 3-state cmos output. figure 9. spi input / out put terminal processing shv sdo 100k ? (typ) 100k ? (typ) 100k ? (typ) slv sclk sdi vreg
datasheet datasheet 17/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M dac and gain setting actuator (fctl1, fctl2, tk) suppose that voltage difference betwe en positive/negative outputs is v out , v out can be expressed as follows. v out = g vact v dac here, g vact value will be different as below depending upon gain mode settings. low gain mode (reg 74h[5] gain_selfctl , reg74h[4] gain_seltk = 0 (default)) g vact1 = 3.85 times (11.7db) high gain mode (gain_sel fctl, gain_seltk = 1) g vact2 = 7.67 times (17.7db) v dac , the dac output voltage, can be obtained from dac register settings through the following equation. msb=0: v dac = 1.0(bit[10]0.5 1 +bit[9]0.5 2 +bit[8]0.5 3 +?+bit[0]0.5 11 ) msb=1:: v dac = (-1.0)(^bit[10]0.5 1 +^bit[9]0.5 2 +^bit[8]0.5 3 +?+^bit[0]0.5 11 +0.5 11 ) dac format (dfctl1, dfctl2, dtk) reg msb digital input (bin) lsb hex dec v dac [v] v out [v]* 01h(dfctl1), 02h(dfctl2), 03h(dtk) 1000_0000_0000 800h -2048 -0.9995 -3.848 1000_0000_0001 801h -2047 -0.9995 -3.848 1000_0000_0010 802h -2046 -0.9990 -3.846 1111_1111_1111 fffh -1 -0.0005 -0.002 0000_0000_0000 000h 0 0 0.000 0000_0000_0001 001h +1 +0.0005 +0.002 0111_1111_1110 7feh +2046 +0.9990 +3.846 0111_1111_1111 7ffh +2047 +0.9995 +3.848 * in low gain mode setting. output voltage saturation is not taken into account in the table. -0.9995 +3.848 v out [v] -3.848 v dac [v] dac code 800h 7ffh 0 +0.9995 figure 10. dac setting vs. v dac /v out (in low gain mode)
datasheet datasheet 18/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M dfctl2=100h, dfctl1=080h ? dfctl2+dfctl1 : 180h dfctl2-dfctl1 : 080h dfctl2=100h, dfctl1=f80h ? dfctl2+dfctl1 : 080h dfctl2-dfctl1 : 180h fctl 1, fctl 2 differential drive mode if you set reg 74h[3] diff_fctl to 0, fctl1 and fctl2 turn into differential drive mode. in this mode, 12 bit data to be input into dac of fctl1 and fctl2 will be the va lues obtained by the following equations. dac fctl1, 2 shows 12-bit data to be input into respective dacs. no te that the dac output voltage v dac , gain gv act and output voltage v out are to be in accordance with page 17. dac fctl1 = dfctl2 + dfctl1 dac fctl2 = dfctl2 ? dfctl2 operation images during the differen tial drive mode are as shown below. fctl1, 2 differential operation images when diff_fctl=0 dfctl1 = 0x000 fctl1 fctl2 dfctl1 > 0x000 fctl1 fctl2 dfctl1 < 0x000 fctl2 fctl1 a b a : +fctl1 b : -fctl1 v out dfctl2 code 7ffh 800h 7ffh 800h 7ffh 800h 0 0 0 v out v out b a a : +fctl1 b : -fctl1 dfctl2 code dfctl2 code if dfctl2=100h and dfctl1=080h if dfctl2=100h and dfctl1=f80h
datasheet datasheet 19/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M loading (ld) suppose that voltage difference betwe en positive/negative outputs is v out , v out can be expressed as follows. v out = g vld v dac here, g vld value will be different as below depending upon gain mode settings. low gain mode (reg 74h[1] gain_selld = 0 (default)) g vld1 = 7.24 times (17.2db) high gain mode (gain_selld =1) g vld2 = 8.51 times (18.7db) v dac , the dac output voltage, can be obtained from dac register settings through the following equation. msb=0: v dac = 1.0(bit[10]0.5 1 +bit[9]0.5 2 +bit[8]0.5 3 +?+bit[0]0.5 11 ) msb=1 : v dac = (-1.0)(^bit[10]0.5 1 +^bit[9]0.5 2 +^bit[8]0.5 3 +?+^bit[0]0.5 11 +0.5 11 ) dac format (dld) reg msb digital input (bin) lsb hex dec v dac [v] v out [v]* 09h(dld) 1000_0000_0000 800h -2048 -0.9995 -7.236 1000_0000_0001 801h -2047 -0.9995 -7.236 1000_0000_0010 802h -2046 -0.9990 -7.233 1111_1111_1111 fffh -1 -0.0005 -0.004 0000_0000_0000 000h 0 0 0.000 0000_0000_0001 001h +1 +0.0005 +0.004 0111_1111_1110 7feh +2046 +0.9990 +7.233 0111_1111_1111 7ffh +2047 +0.9995 +7.236 * in low gain mode setting. output voltage saturation is not taken into account in the table. -7.236 -0.9995 v out [v] v dac [v] +7.236 +0.9995 800h dac code 07ffh figure 11. dac setting vs. v dac /v out (in low gain mode)
datasheet datasheet 20/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M sled (sl1, sl2) suppose that i o peak represents peak output current, i o peak can be expressed in the following ways. i o peak = 0 ( | v dac | < v dzsl ) i o peak = gm sl | v dac | ( gm sl | v dac | < i limsl ) i o peak = i limsl ( gm sl | v dac | > i limsl ) where v dzsl is input deadzone (single-si ded) of 15mv (typ). the gm sl is output/input gain and i limsl is output limit current, and they can be obtained respectively as follows. gm sl = 0.616 / r slrnf [a/v] i limsl = 0.52 / r slrnf [a] v dac , the dac output voltage, can be obtained from dac register settings through the following equation. msb=0 v dac = 1.0(bit[10]0.5 1 +bit[9]0.5 2 +bit[8]0.5 3 +?+bit[2]0.5 9 ) msb=1 v dac = (-1.0) (^bit[10]0.5 1 +^bit[9]0.5 2 +^bit[8]0.5 3 +?+^bit[2]0.5 9 +0.5 9 ) dac format (dsl1, dsl2) reg msb digital input (bin) lsb hex dec v dac [v] i o peak [a]* 04h(dsl1), 05h(dsl2) 1000_0000_0000 800h -2048 -0.9980 -1.098 1000_0000_0100 804h -2044 -0.9980 -1.098 1111_1110_0000 fe0h -32 -0.0156 -0.017 1111_1110_0100 fe4h -28 -0.0137 0 1111_1111_1100 ffch -4 0.0020 0 0000_0000_0000 000h 0 0 0 0000_0000_0100 004h +4 +0.0020 0 0000_0001_1100 01ch +28 +0.0137 0 0000_0010_0000 020h +32 +0.0156 0.017 0111_1111_1000 7f8h +2040 +0.9961 +1.096 0111_1111_1100 7fch +2044 +0.9980 +1.098 *output voltage saturation and limit current se tting are not taken into account in the table. 1.10 a/v -1.098 =v dzsl (input deadzone) =gm sl (input-output gai n +/- 15mv fe4h -0.998 i o peak [a] v dac [v] +1.098 +0.998 800h dac code 07 f c h +0.93 -0.93 01ch =i limsl (limit current) figure 12. i o peak characteristics (when set as r slrnf =0.56 ? ).
datasheet datasheet 21/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M spindle (sp) suppose that i o peak represents peak output current, i o peak can be expressed in the following ways. i o peak = 0 ( | v dac | < v dzsp ) i o peak = gm sp | v dac | ( gm sp | v dac | < i limsp ) i o peak = i limsp ( gm sp | v dac | > i limsp ) where v dzsp is input deadzone (single-sid ed) of 10mv (typ). the gm sp is output/input gain and i limsp is output limit current, and they can be obtained respectively as follows. gm sp = 0.409 / r sprnf [a/v] i limsp = 0.35 / r sprnf [a] v dac , the dac output voltage, can be obtained from dac register settings through the following equation. msb=0 : v dac = 1.0(bit[10]0.5 1 +bit[9]0.5 2 +bit[8]0.5 3 +?+bit[0]0.5 11 ) msb=1 : v dac = (-1.0)(^bit[10]0.5 1 +^bit[9]0.5 2 +^bit[8]0.5 3 +?+^bit[0]0.5 11 +0.5 11 ) dac format (dsp) reg msb digital input (bin) lsb hex dec v dac [v] i o peak [a] 08h(dsp) 1000_0000_0000 800h -2048 -0.9995 -1.239 1000_0000_0001 801h -2047 -0.9995 -1.239 1111_1110_1011 febh -21 -0.0103 -0.013 1111_1110_1100 fech -20 -0.0098 0 1111_1111_1111 fffh -1 -0.0005 0 0000_0000_0000 000h 0 0 0 0000_0000_0001 001h +1 +0.0005 0 0000_0001_0100 014h +20 +0.0098 0 0000_0001_0101 015h +21 +0.0103 0.013 0111_1111_1110 7feh +2046 +0.9990 +1.238 0111_1111_1111 7ffh +2047 +0.9995 +1.239 *output voltage saturation and limit current se tting are not taken into account in the table. i o peak [a] v dac [v] +1.239 +0.9995 +1.06 =i limsp (limit current) -1.06 -1.239 1.24 a/v =gm sp (input-output gai n 800h fech dac code 0 014h -0.9995 =v dzsp (input deadzone) 7ffh +/- 10mv figure 13. i o peak characteristics (when set as r sprnf =0.33 ? ).
datasheet datasheet 22/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M description of driver operations lvds for spherical aberration driver (sa1, sa2) lvds for spherical aberration driver delivers output corres ponding to data stored in dsa1 and dsa2, in accordance with the table below. sao1+ and sao1- correspond to dsa1, while sao2+ and sao2- to dsa2, and they can be controlled independently. recommended operation frequency of each output is 10 khz or less. dac format (dsa1, dsa2) reg msb digital input (bin) lsb hex dec sao+ sao- 06h(dsa1), 07h(dsa2) 0 - - -_- - - -_- - - - 000h 0 l h 1 - - -_- - - -_- - - - 800h -2048 h l figure 14. timing chart of lvds for spherical aberration driver vod = |v(sao1+)-v(sao1-)| voc= (v(sao1+ )+v(sao1-))/2 sao1- sao1+ 0v(gnd) dsa1 01 0 1 vod = |v(sao2+)-v(sao2-)| voc= (v(sao2+ )+v(sao2-))/2 sao2- sao2+ 0v(gnd) dsa2 010
datasheet datasheet 23/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M sled motor driver figure 15. sled motor driver block figure 16. current paths in set [state 1] and reset [state 2] figure 17. sled motor driver operation timing chart set [state1] : output turned on at the rise of pwm clock --> load current supplied from vcc. reset [state2] : output turned off when load current incr eases to reach current value proportional to input or limit current value --> load current regenerated by l component of the motor through the path shown in state 2 diagram. m m vcc slrnf1 on off on off on off off on vcc reset set slo1+ i o state 2 state 1 slo1- slrnf1 slo1+ slo1-
datasheet datasheet 24/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M spindle driver 1. spindle driver input -output characteristics figure 18 shows input-output characteristics of the average current detection control and the peak current detection control. this ic controls output by detecting peak current. linearity of the input/output char acteristics is improved compared with the one in the average current detection method. speed of rotation [rpm] (a) peak current control method (bD8256EFV-M) (b) average current control method figure 18. spindle driver i nput-output characteristics difference in input/output characteristics due to control method can be explained as below. motor coil comprises not only pure inductance but also impedance component. suppose that v o represents peak value of output pulse, i o , current which flows into the motor when output pulse is turned on, can be expressed in the following ways. r l v o v o ,i o t i o v o i o figure 19. current waveform including impedance component you can see from the above equati on that motor current io follows a curve of nat ural logarithm. if you try to express this as motor current characteristics as opposed to input voltage co ntrolled by the respective methods, you will get figure 20. spindle motor speed is proportional to mo tor current. in case of pwm driver, motor current is roughly equivalent to peak current because it includes regenerative current. in the peak current control, therefore, motor current (rotation speed) becomes proportional to input voltage. in contrast, in the average current contro l, average value of supply current (integr al of supply current) becomes proportional to input voltage. so motor current (rotation speed) as opposed to input voltage roughly follows a curve of natural logarithm (figure 20. (b)). and therefore, you get higher gain in low speed range. )e1( r v i dt )t(di lr)t(iv t l r o o o oo ? ?? ????
datasheet datasheet 25/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M (a) peak current control (b) average current control figure 20. input voltage vs. motor current 2. current limit operation. figure 21 shows the operation timing chart. in this ic, flip-flop is activated based on a clock signal gen erated by the built-in triangular wave generator to generate pwm pulse. the spindle driver starts operation at the rising edge of internal clock. shor t brake mode is activated if peak current defined by limit current or gain is detect ed, and no output pulse is delivered until next clock input. both during limit curren t detection and usual peak current detection, it operates at pwm oscillating frequency generated by the same internal clock. figure 21. spindle driver operation timing chart vcc sprnf spcnf time voltage, current dotted line bhld(no capa case) charge charge charge i o (load current) i o peak (peak load current) internal clock (100khz) output state short brake active active active active peak current detection by limit current or gain. internal clock rise bhld short brake short brake
datasheet datasheet 26/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 3. role of capacitors of bhld and spcnf terminals figure 22 shows a block diagram of the spindle driver. in this ic, peak current control method is realized by monitoring io, the load current flowing in the spindle motor, at sprnf terminal, and holding the peak current in c bhld , the capacitor connected to bhld terminal. charging time of bhld terminal is a time constant defined by capacity of c bhld and 200 k ? (typ) internal resistance. c spcnf , the capacitor of spcnf terminal, influences f c , the cut-off frequency, of the spindle driver control loop. f c can be expressed in the following formula. where r oerr is internal error amplifier output impedance of approximately 700 k ? (typ). oerr spcnf c rc 2 1 f ? amp. comp. h+ h- sprnf vcc hall signal triangle wave (internal oscillation) wave range control u_out v_out w_out output current waveform vcc bhld(pin9) spcnf(pin8) 200k c bhld (external) bd8256efv vcc error amp pwm duty control, short brake control when limit current detected amp. amp. c sprnf (external) d/a vcc limit current reference voltage comp. limit detection signal i o , spindle current figure 22. spindle driver block diagram 4. spindle hall signal setting in this ic, as shown in figure 22, low noise (silence) is realized by controlling output current into a sine wave. hall signal amplified according to reg 08h dsp is used to control the output current. so, if amplitude of the hall signal is too small, amplitude of the output current will also be too small, and rotation speed will become too low. therefore, make sure that input level of the hall signal be 50 mv (input level at hall amplifier: v him ) or greater as shown in figure 23. also make sure that waveform of the hall signal be as close as possible to sine wave. figure 23. minimum amplitude of hall input (example of hu+ and hu- input).
datasheet datasheet 27/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 5. hall input (pin 1 to pin 6) / hall bias (pin 7) (spindle) hall elements can be connected either in series or in parallel as shown in figure 24. hall input voltage should be set within the range of 1.0 v to 3.8 v (in-phase input voltage range of hall amplifier: v hicm ). figure 24. example of hall elements connection 6. fg pulse 3fg is output to fg terminal. pull-up resistor of fg is recommended to be 3.3 k ? or less. if the resistance setting is higher than that, high logic of fg output can be reversed to become "low" as soon as spindle output becomes hi-z. since fg pulse is generated from hall output signal, it can become unstable if the hall signal catches noise. radiation noise on circuit patterns or flexible cables should be avoided as much as possible. against any remaining noise, it is recommended to insert a capacitor (around 0.01 f) between positive and negative sides of the hall signal. 7. reverse brake when reverse brake is done coming from high speed, take note of the counter-electromotive force. also, consider the speed of motor rotation to ensure sufficient output current when using the reverse brake. 8.capacitor between spvm-spgnd there is change in voltage and current because of the st eep drive pwm. the capacitor between spvm-spgnd is placed in order to suppress the fluctuations due to the spvm voltage. however, the effect is reduced if this capacitor is placed far from the ic due to the effect of line impedances. therefore, this capacitor should be placed near the ic.
datasheet datasheet 28/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 9. spindle dricer input-output timing chart hu- hu+ hv- hv+ hw+ hw- u_out v_out w_out sink source sink source sink source fg low high hu- hu+ hv- hv+ hw+ hw- u_out v_out w_out sink source sink source sink source fg low high (a) forward mode (dsp>000h) (b) short brake mode (dsp<000h, reg 74h[6]=0) (c) reverse brake mode (dsp<000h, reg 74h[6]=1) (b) anti-reverse mode (dsp<000h, reg 74h[6]=1, after reverse detected) abcdef state gh i j k l state
datasheet datasheet 29/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M start-up operation 1. startup signals ? 5v power supply prevcc, fctlrnf, tkrnf ? 8v power supply vcc, sprnf, slrnf1, slrnf2 ? 3.3v power supply shv ? muteb (input terminal) standby (low) / active (high) setting for whole ic ? xxx_psb (spi control signal) power save (0) / active (1) setting for control circuits of 9ch blocks ? xxx_en (spi control signal) open (0) / active (1) setting for output of 9ch blocks ? muteb_d (internal signal) standby / active control for analog block there may be 15 s (max) delay from muteb. ? resetb (internal signal) reset /active control for spi block and logic block 2. start-up and shut-down sequences make sure to turn on 5v power supply before 8v and 3.3v power supplys. otherwise internal logic becomes indefinite and abnormal output may be produced. as long as 5v power is tur ned on first, either 8v or 3.3v may be turned on next. there are no special requirements on sequence of power shut down. . muteb xxx_psb xxx_en input signal muteb_d protect circuit active resetb internal signal (reference) start to receive spi input muteb_delay 15 s (max) output reset_delay 30 s (max) a nalog block active logic block active output state outen_delay 45 s (max) 0 1 high low 0 1 open active power supply 5v 8v 4.0v turn on 8v and 3.3v power supply after 5v becomes 4.0v or greater. 4.0v input high on muteb after 8v becomes 4.0v or greater. 3.3v
datasheet datasheet 30/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M description of functions 1. output voltage state (spindle / sled motor) spindle sled motor under input dead zone hi-z short brake under current limit operatio n short brake short brake 2. pwm oscillation frequency (spindle / sled motor) pwm oscillation of the spindle and the sled motor is internally free-running. oscillation frequency is 100 khz (typ). 3. uvlo if vcc or prevcc terminal voltage becomes 3.8 v (typ) or less, or vreg terminal voltage becomes 2.0 v (typ) or less, output of all channels turns off (hi-z). * reg 77h[0] uvlo_vcc is set to "1" while uvlo is activa ted. and uvlo_vcc is reset to "0" if prevcc terminal voltage becomes 2.0 v (typ) or less, or vreg terminal vo ltage becomes 1.2 v (typ) or less, but this is below the operational voltage range and some register state may be unsustainable depending on degree of voltage drop. 4. thermal shutdown thermal shutdown (over temperature protection circuit) is built-in in order to prevent thermal breakage of ic. the package should be used within acceptable power dissipation, but in case where it is left beyond the acceptable power dissipation, junction temperature rises, and thermal shutdown is activated at 175 (typ) and all the channel outputs are turned off (hi-z). then, when the junction temperature falls down to 150 (typ), the channel outputs are turn on again. note that even though the thermal shut down is operating, ic may be overheated and end up broken if heat is continuously applied from outside. * reg 77h[3] tsd is set to "1" while thermal shutdown is ac tivated, but this condition is beyond the rated temperature and all register states may be unsustainable depending on degree of temperature rise. 5. loading supply/ground-fault protection this is the function to prevent breakage of output power mos when there exist the conditions that may break the output power mos if loading output is supply/ground-faulted. ? supply-fault occurs when sink-side power mos is on, and the supply-fault protection is performed if output terminal voltage of (power supply - 1 vf) or greater and su pply-fault current are detected at the same time. here, the output is off-latched. note that 1 vf = 0.7v (typ). ? ground-fault occurs when source-side power mos is on, and the ground-fault protection is performed if ground-fault current is detected. here, the output is of f-latched. note that the ground-fault detection current is dependent on the output voltage. see figure 25. * reg 77h[4] short_ld is set to "1" if the loading supply/ground-fault protection is activated. * you can reset the protection mode by resetting reg 75h[2] short_reset if the protection mode is activated and the output is off-latched. * high frequency noise suppression filter is built in the s upply/ground-fault protection circuit, but the supply/ground-fault protection may be activated against the noise of 10 s (typ) or greater. 1.0 1.2 1.4 1.6 1.8 2.0 012345678 ground short detection current (a) output voltage (ground referenced) (v) figure 25. output voltage vs ground short detection current vcc=8v ta = rt
datasheet datasheet 31/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 6. packet bit counts error serial input signal of this ic consists of 16 bits in one packet. if counts of the sclk rising during the period between falling and rising of slv are anything but 16 times, it is determined as a erroneous packet and reg 77h[2] pkt_err is set to "1". any data determined as an erroneous packet are nullified, and the registers maintain the state immediately before the error. note that pkt_err remains at "1" even though the next 1 packet is sent and counts of the clock rising during the period between falling and rising of slv are 16 times. but this error will not open (i.e. turn off) the output circuit. 7. packet watchdog timer if reg 76h[5,4] pktstop_time is preset to anything but " 00" and there is no valid packet (16 bits) rising of slv within this preset time period, reg 77h[1] pkt_stop will be set to "1" and all outputs will be off-latched (hi-z). * you can reset the protection mode by resetting reg 75h[4] rst_pktstop if the protection mode is activated and the output is off-latched. 8. errout terminal if either the packet bit counts error or the packet watchdog timer is activated, this terminal switches to high as an error flag. 9. prtout terminal operational state of muteb, uvlo and actuator overcurrr ent protection is output to prtout terminal. output conditions are as per the following table. muteb uvlo overcurrent protection prtout l on on h* off off on off h on on off off on off l *when connected with pull-up resistor. 10. vreg terminal vreg terminal is the regurator output for internal blocks. a 0.01 f compensating capacitor shall be connected across the vreg terminal. any value less than 0.01 f, or no compensating capacitor wi ll result in system instablity.
datasheet datasheet 32/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 11. actuator overcurrent protecti on (ocp: over current protection) this is the function to protect the actuator when overcurrent condition is detected over a preset time period. prtt, prtft prtout actuator output > 2.95v h hi-z (protection enabled) < 2.95v l active charges/discharges the capacitor with current proportional to load current based on the externally preset load current threshold as "0". time period until the protection is activated is subject to the value of the capacitors connected to prtt and prtft terminals and the resistors connected to tkrnf, fctlrnf, tkcdet, fctlcdet and prtlim terminals. default value of prtt and prtft terminals is 1.06 v (typ). the protection is activated at 2.95 v (typ). (be aware that the protection will be activated even at start-up or when recovered from stand-by, as long as voltage of 2.95 v or greater remains at prtt or prtft terminal.) the protection will be deactivated when voltage at prtt and prtft terminals falls down to 1.1 v or less and reg 75h[3] rst_ocp is set to "1" at that timing. figure 26. ocp timing chart
datasheet datasheet 33/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 12. example of constants setting for actuator overcurrent protection circuit figure 27. overcurrent protection circuit constants capacitor-recharging/discharging current i sink and i source can be obtained respectively as follows. 2 sink r vprtlim i ? , 1 o source r irnf i ? ? load current i t (threshold current) which begins to det ect overcurrent is the current where i sink =i source , and can be obtained as follows. rnf vprtlim r r i r irnf r vprtlim ii 2 1 t 1 t 2 source sink ?? ? ? ? i sink < i source , so t d , the time period until error detection flag is output, should be the time period until prtft/prtt voltage becomes 2.95 v (typ) and can be obtained as follows. ( v89.106.195.2 vprref vprtlim v d ??? ? ? ) 2 1 o d d sink source d d d sink source d r vprtlim r irnf vc t ii vc t t)ii(vc ? ? ? ? ? ? ? ?? ?? for example, suppose that t d =100 ms, i o =200 ma, i t =100 ma, rnf=0.5 ? and r 2 =47 k ? , r 1 and c can be obtained respectively as follows. ) ? k(4.4m100 53.0 5.0k47 i vprtlim rnfr r t 2 1 ?? ? ?? ? ? )f (61.0 k47 53.0 k4.4 m2005.0 89.1 m100 r vprtlim r irnf v t c 2 1 o d d ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? ?? also, t dc , the time period after activation of the protection until prtft/prtt voltage goes down to the default voltage (1.06 v typ) through discharge of c, can be obtained as follows. dcksind tivc ??? )ms(102 53.0 k47)06.195.2(59.0 i )vprref vprtdet (c i vc t sink sink d dc ? ??? ? ? ? ? ? ?? 5v power supply r 1 (delete) tkcdet / fctlcdet i source prtt/prtft prtlim 2.95v or 1.1v mute signal prtout matrix vi vi conversion tko+ fctlo1+ fctlo2+ vprtref:1.06v(typ) vprtdet:3.0v(typ) vprtlim:0.53v(typ) tkrnf / fctlrnf vofdet r 2 rnf(0 ) c(delete) * the above voltmeters indicate where electric characteristics should be measured. ( ) indicates processing in case of not using ocp function . 3.3v 33k i sink i o tko- fctlo1- fctlo2- conversion
datasheet datasheet 34/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M noise suppression the following are possible causes of noise of the pwm driver. a. noise from power line or ground b. radiated noise - countermeasures against a - (1) reduce impedance in wiring for the driver's 8 v power supply (sprnf, slrnf 1, slrnf 2, vcc), 5v power supply (fctlrnf, tkrnf) and power gnd (spgnd, slgnd, actgnd) lines where high current flows. make sure that they be separated from power supply lines of other devices at the root so that they do not have common impedance. (figure 28) figure 28. pattern example (2) provide a low esr electrolytic capacitor between the power terminal and the ground terminal of the driver to achieve strong stabilization. provide a ceramic capacitor with good high frequency property next to the ic. also provide a ceramic capacitor with good high frequency property between rnf and gnd. (figure 29) then power supply ripple due to pwm switching and spindle motor rotation can be reduced. figure 29. position of ceramic capacitors
datasheet datasheet 35/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M (3) if you could not improve the situation by (1) and (2), another wa y is to insert a lc filter in the power line or the ground line. example: figure 30. lc filter diagram (4) or you can also add a capacitor of around 2200 pf between each output and the ground. in this case, ensure that the gnd wiring should not have any common impedance with other signals. figure 31. snubber circuit 47 f 120 h pwm driver ic vcc gnd 47 f 120 h pwm driver ic gnd vcc 47 f 120 h pwm driver ic gnd vcc 120 h 0.1 f 0.1 f 0.1 f 2200pf pwm output- m pwm output+
datasheet datasheet 36/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M - countermeasures against b - see figure 32 - (1) ensure certain distance between rf signal line and pwm-driven output line. if they must be located inevitably too close, shield the rf signal line with gnd except the stable gnd. (2) like in (1), flexible cable to the pickup should be shielded with gnd in order to separate noise between the signal line and the actuator drive output line. (3) connect the motor system and the actuator system to separate flexible cables. (4) as fg pulse is generated from hall signal, provide a shield with stable gnd or other wire with low impedance between the pwm output and the hall signal so that noise is not radiated from the flexible cable and the board pattern. figure 32. rf noise suppression actuator output rf pick up gnd sled output bD8256EFV-M (2) gnd shield (3) flex to pickup (3) make sure to separate from gnd of driver and motor board (3) flex to motor (4) gnd shield hall signal spindle output (1) gnd shield
datasheet datasheet 37/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M power supply and ground *( ) is pin. figure 33. power supply and ground prevcc vcc sprnf actgnd pregnd slgnd spgnd slrnf1 tkrnf sp output sp predrive sp hall sp dac sl output sl predrive sl dac ld output ld predrive ld dac act output act predrive act dac slrnf2 fctlrnf u_out v_out w_out slo1+ slo2- ~ ldo+ ldo- fctlo+ ~ tko- shv spi sa lvds reg sdo sa1o+ ~ sa2o- vreg
datasheet datasheet 38/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M application example figure 34. application example hall1 back side metal -con shv sdo sdi sclk slv fctlo1- fctlo1+ tko- tko+ ldo- ldo+ slo2- slo2+ slo1- slo1+ u_out v_out w_out hall_vc hw- hw+ hv- hv+ hu- hu+ hall2 hall3 sao1+ sao1- pregnd spgnd slgnd fg fg vcc slrnf1 r slrnf1 slvm slrnf2 prtlim tkrnf tkcdet fcrnf fccdet avm prtt prtft sprnf r sprnf spvm bhld c bhld spcnf prtout prtout sao2+ sao2- ldd errout errout shv hvcc prevcc muteb vreg fctlo2- fctlo2+ actgnd spgnd pregnd actgnd slgnd pregnd pregnd c sprnf spgnd slgnd pregnd pregnd pregnd pregnd actgnd pregnd c spvm c spcnf r tkrnf r fcrnf r tkcdet r fccdet c avm c prtt c prtft r slrnf2 c slvm c slrnf1 c slrnf2 c shv r hvcc r hallvc c vcc c prevcc r prtlim c vreg r fg r prtout r errout powergnd pregnd powergnd
datasheet datasheet 39/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M recommended values component name component value product name manufacturer c vcc 0.1 f gcm188r11h series murata 47 f ucd1e470mcl nichicon c prevcc 0.1 f gcm188r11h series murata c bhld 470pf gcm188r11h series murata c spvm 0.1 f gcm188r11h series murata 47 f ucd1e470mcl nichicon r sprnf 0.33 ? mcr100 series rohm c sprnf 0.1 f gcm188r11h series murata c spcnf 0.01 f gcm188r11h series murata c avm 0.1 f gcm188r11h series murata 47 f ucd1e470mcl nichicon r tkrnf 0.5 ? mcr100 series rohm r tkcdet 10k ? mcr03 series rohm r fcrnf 0.5 ? mcr100 series rohm r fccdet 10k ? mcr03 series rohm c prtt 0.1 f gcm188r11h series murata c prtft 0.1 f gcm188r11h series murata c slvm 0.1 f gcm188r11h series murata 47 f ucd1e470mcl nichicon r slrnf1 0.56 ? mcr100 series rohm r slrnf2 0.56 ? mcr100 series rohm c slrnf1 0.1 f gcm188r11h series murata c slrnf2 0.1 f gcm188r11h series murata c shv 0.1 f gcm188r11h series murata r hvcc 100? mcr03 series rohm r hallvc 100? mcr03 series rohm c vreg 0.01 f gcm188r11h series murata r prtlim 47k ? mcr03 series rohm r fg 3.3k ? mcr03 series rohm r prtout 33k ? mcr03 series rohm r errout 33k ? mcr03 series rohm
datasheet datasheet 40/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M power dissipation 0 1 2 3 4 5 6 7 0 25 50 75 100 125 150 175 power dissipation [w] ambient temperature [c] (4) 6.2w (3) 4.5w (2) 2.5w (1) 2.0w figure 35. power dissipation note 1: power dissipation calculated when mounted on 70mm x 70mm x 1.6mm glass epoxy substrate 1-layer platform. note 2: power dissipation changes with the copper foil density of the board. this value represents only observed values, not guaranteed values. the board and the back exposure heat radiation board are connected through solder. board(1) : 1-layer board (backside copper thickness 0mm 0mm) board(2) : 2-layer board (backside copper thickness 20mm 11mm) board(3) : 2-layer board (backside copper thickness 70mm 70mm) board(4) : 4-layer board (backside copper thickness 70mm 70mm) board(1) : ja = 62.5 c/w board(2) : ja = 50.0 c/w board(3) : ja = 27.8 c/w board(4) : ja = 20.2 c/w
datasheet datasheet 41/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M input-output equivalent circuit (number is pin number, the value of resistor and capacitor is typical value) 1.hu+, 2.hu-, 3.hv+, 4.hv-, 5.hw+, 6.hw- 7.hall_vc 8.spcnf 9.bhld 33 30 8 33 30 10k ? 500 ? 500 ? 500 ? 10k ? 10.sprnf 11.fg 30 10 2k ? 5k ? 33 30 1.03k ? 12.u_out, 13.v_out, 14.w_out, 17.slo1+, 18.slo1-, 20.slo2+, 21.slo2- 19.slrnf1, 22.slrnf2 16 22 33 30 19 30k ? 10pf 23.errout, 36.prtout 24.sdo
datasheet datasheet 42/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M 25.sdi, 26.sclk, 35.muteb 27.slv 28.vreg 31.prtt, 32.prtft 34.prtlim 37.ldo-, 38.ldo+ 40.tko+, 41.tko-, 42.fctlo1+, 43.fctlo1-, 44.fctlo2+, 45.fctlo2- 46.sao1+, 47.sao1-, 48.sao2+, 49.sao2- 50.tkcdet, 51.fctlcdet 52.fctlrnf, 53.tkrnf
datasheet datasheet 43/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the ic?s power supply terminals. 2. power supply lines design the pcb layout pattern to provide low impedance supply lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and s upply lines of the digital bloc k from affecting the analog block. furthermore, connect a capacitor to ground at all power supply pins. consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. however, pins that drive inductive loads (e.g. motor driver output s, dc-dc converter outputs) may inevitably go below ground due to back emf or electromotive force. in such cases, the user should make sure that such voltages going below ground will not cause the ic and the system to malfunction by examining carefully all relevant factors and conditions such as motor characteristics, supply voltage, operating frequency and pcb wiring to name a few. 4. ground wiring pattern when using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. the absolute maximum rating of t he pd stated in this specification is when the ic is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. in case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the pd rating. 6. recommended operating conditions these conditions represent a range within which the expect ed characteristics of the ic can be approximately obtained. the electrical characteristics are guaranteed under the conditions of each parameter. 7. rush current when power is first supplied to the ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the ic has more than one power supply. therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field may cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors completely after each process or step. the ic?s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground t he ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when mounting the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each ot her especially to ground, power supply and output pin. inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few.
datasheet datasheet 44/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M operational notes ? continued 11. unused input terminals input terminals of an ic are often connected to the gate of a mos transistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the electr ic field from the outside can easily charge it. the small charge acquired in this way is enough to produce a signifi cant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise specified, unused input terminals should be connected to the power supply or ground line. 12. regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrat e layers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of t he p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a parasitic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical dam age. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd voltage to an input pin (and thus to the p substrate) should be avoided. figure 36. example of monolithic ic structure 13. ceramic capacitor when using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to dc bias and others. 14. area of safe operation (aso) operate the ic such that the output voltage, output current, and power dissipation are all within the area of safe operation (aso). 15. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that pr events heat damage to the ic. normal operation should always be within the ic?s power dissipation rating. if however the rating is exceeded for a continued period, the junction temperature (tj) will rise which will activate the tsd circuit that will turn off all output pins. when the tj falls below the tsd threshold, the circuits are automatically restored to normal operation. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set desi gn or for any purpose other than protecting the ic from heat damage.
datasheet datasheet 45/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M ordering information b d 8 2 5 6 e f v - m e 2 part number package efv : htssop-b54 packaging and forming specification m: high relaiability e2: embossed tape and reel (htssop-b54) marking diagram htssop-b54 (top view) bd8256efv part number marking lot number 1pin mark
datasheet datasheet 46/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M physical dimension, tape and reel information package name htssop-b54 ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape (with dry pack) tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 1500pcs e2 () direction of feed reel 1pin
datasheet datasheet 47/47 tsz02201-0g1g0bk00030-1-2 ? 2013 rohm co., ltd. all rights reserved. 25.apr.2014 rev.003 www.rohm.com tsz22111 ? 15? 001 bD8256EFV-M revision history date revision changes 1.aug.2013 002 new release 25.apr.2014 003 p.1 add the sentence of aec-q100 qualified at the features
datasheet datasheet notice ? ss rev.002 ? 2013 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. if you intend to use our products in devices requiring extremely high reliability (such as medical equipment (note 1) , aircraft/spacecraft, nuclear power controllers, etc.) and whos e malfunction or failure may cause loss of human life, bodily injury or serious damage to property (?specific applications?), please consult with the rohm sales representative in advance. unless otherwise agreed in writ ing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses in curred by you or third parties arising from the use of any rohm?s products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class classb class class class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are not designed under any special or extr aordinary environments or conditi ons, as exemplified below. accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohm?s products under an y special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification
datasheet datasheet notice ? ss rev.002 ? 2013 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohm?s internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties.
datasheet datasheet notice ? we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information.

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